Stefan Van Waasen

Bio Details - (TBC)

Enable scaling for spin-qubit quantum computing by cryo-CMOS 

A major challenge for scalable quantum computers is the wiring bottleneck, which could be solved by using integrated cryogenic control systems instead of room temperature control for the qubits. The Integrated Computing Architectures Institute (ICA) at Forschungszentrum Juelich specializes in the development of cryo-electronics solutions for solid-state quantum computing. A significant portion of a quantum computer’s functionality does not directly involve the quantum layer, but rather classical signal and data processing. This includes the generation of control pulses, the analysis of readout signals, and higher-level runtime tasks such as qubit calibration and error decoding. This talk will focus on our system-level ideas for the scalable control and readout of semiconductor spin qubits. Our approaches are based on the SpinBus [1] architecture, which requires DC biasing for the initialization and readout zones, the generation of shuttling signals to transport the qubits, and the generation of manipulation pulses to execute qubit gates. The biasing voltages as well as shuttling and manipulation signals also have to be calibrated and the readout signal have to be analyzed. In the talk, we provide an overview of the various required components and an outlook on a scalable system based on them.

[1] Künne, M., Willmes, A., Oberländer, M. et al. The SpinBus architecture for scaling spin qubits with electron shuttling. (2024). https://doi.org/10.1038/s41467-024-49182-4